Unable to read analysis file
After giving all values and the Kicad to NGspice is successfully converted while simulation its showing as unable to read analysis file. How to resolve it???
eSim Schematic-Creation-and-Simulation 05-06 min 30-40 sec 15-05-20, 9:50 a.m. motheabhinay.reddy2019@vitstudent.ac.in

#### Answers:

Can you please post the netlist here ( the one with cir.out extension)
15-05-20, 9:52 a.m. Saurabhb17
* e:\fossee\esim\work\mppt_final\mppt_final.cir
.include NMOS-180nm.lib
.include PMOS-180nm.lib
v1 net-_m1-pad3_ net-_i1-pad2_ 2
r2 net-_i1-pad1_ v_pv 1
r1 net-_i1-pad1_ net-_i1-pad2_ 50k
m11 a vdelay b vdd CMOSP W=1u L=1u M=1
r6 net-_m10-pad1_ net-_c4-pad1_ 1m
r5 net-_m10-pad1_ gnd 600k
c4 net-_c4-pad1_ gnd 8p
r7 net-_c4-pad1_ net-_g1-pad3_ 1m
r8 vdd net-_g1-pad3_ 1m
* u2 net-_u1-pad3_ net-_m5-pad2_ net-_u2-pad3_ d_xnor
* u3 net-_u2-pad3_ vdelay vdd gnd net-_m5-pad2_ ? d_dff
e1 d gnd net-_e1-pad3_ net-_e1-pad4_ 10000
c1 v_pv gnd 1u
m3 net-_l1-pad1_ dbar gnd gnd CMOSN W=100u L=340u M=1
l1 net-_l1-pad1_ net-_l1-pad2_ 1u
m4 net-_l1-pad2_ d gnd gnd CMOSN W=340u L=340u M=1
m2 net-_l1-pad1_ dbar v_pv v_pv CMOSP W=100u L=340u M=1
m9 net-_l1-pad2_ vcap vcap vcap CMOSP W=240u L=340u M=1
m10 net-_m10-pad1_ vcap net-_l1-pad2_ vcap CMOSP W=240u L=340u M=1
c2 vcap gnd 470u
m7 net-_m7-pad1_ c2 vdd vdd CMOSP W=3u L=1u M=1
m8 net-_c3-pad1_ net-_m5-pad2_ net-_m7-pad1_ vdd CMOSP W=240u L=240u M=1
m5 net-_c3-pad1_ net-_m5-pad2_ net-_m5-pad3_ gnd CMOSN W=240u L=240u M=1
m6 net-_m5-pad3_ c1 gnd gnd CMOSN W=1u L=1u M=1
c3 net-_c3-pad1_ gnd 30p
* u1 a b net-_u1-pad3_ summer
* u4 net-_r3-pad2_ net-_c3-pad1_ net-_e1-pad3_ summer
r3 v_pv net-_r3-pad2_ 1m
r4 net-_r3-pad2_ gnd 1m
m14 c2 c2 vdd vdd CMOSP W=3u L=1u M=1
m13 c1 c1 gnd gnd CMOSN W=1u L=1u M=1
i2 c1 c2 100n
e2 dbar gnd net-_e1-pad4_ net-_e1-pad3_ 10000
g1 a gnd net-_g1-pad3_ gnd 1
m1 net-_i1-pad1_ net-_i1-pad1_ net-_m1-pad3_ gnd CMOSN W=50u L=240u M=1
v3 vclk_in gnd 1.8
v5 net-_e1-pad4_ gnd 1.8
m21 vb net-_m19-pad1_ gnd gnd CMOSN W=100u L=100u M=1
m22 vb net-_m19-pad1_ vdd vdd CMOSP W=100u L=100u M=1
m23 vdelay vb gnd gnd CMOSN W=100u L=100u M=1
m24 vdelay vb vdd vdd CMOSP W=100u L=100u M=1
m17 net-_m17-pad1_ net-_m15-pad1_ gnd gnd CMOSN W=100u L=100u M=1
m18 net-_m17-pad1_ net-_m15-pad1_ vdd vdd CMOSP W=100u L=100u M=1
m19 net-_m19-pad1_ net-_m17-pad1_ gnd gnd CMOSN W=100u L=100u M=1
m20 net-_m19-pad1_ net-_m17-pad1_ vdd vdd CMOSP W=100u L=100u M=1
m15 net-_m15-pad1_ vclk_in gnd gnd CMOSN W=100u L=100u M=1
m16 net-_m15-pad1_ vclk_in vdd vdd CMOSP W=100u L=100u M=1
c5 b gnd 20p
v2 vdd gnd 1.8
m12 b vb a gnd CMOSN W=1u L=1u M=1
* u7 ? plot_v1
* u6 ? plot_v1
* u5 ? plot_v1
* u8 ? plot_v1
i1 net-_i1-pad1_ net-_i1-pad2_ dc 20m
a1 [net-_u1-pad3_ net-_m5-pad2_ ] net-_u2-pad3_ u2
a2 net-_u2-pad3_ vdelay vdd gnd net-_m5-pad2_ ? u3
a3 [a b ] net-_u1-pad3_ u1
a4 [net-_r3-pad2_ net-_c3-pad1_ ] net-_e1-pad3_ u4
* Schematic Name: d_xnor, NgSpice Name: d_xnor
.model u2 d_xnor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_dff, NgSpice Name: d_dff
.model u3 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
* Schematic Name: summer, NgSpice Name: summer
.model u1 summer(in_offset=[0.0 0.0 ] in_gain=[1.0 1.0 ] out_gain=1.0 out_offset=0.0 )
* Schematic Name: summer, NgSpice Name: summer
.model u4 summer(in_offset=[0.0 0.0 ] in_gain=[1.0 1.0 ] out_gain=1.0 out_offset=0.0 )
.tran 0.1e-03 5e-03 0e-03
* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
plot v(?)
plot v(?)
plot v(?)
plot v(?)
.endc
.end
27-06-21, 10:04 a.m. Sachin_Dalabanjan
getting the Same error. I have posted the .cir file please have a look sir
27-06-21, 10:06 a.m. Sachin_Dalabanjan

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